; generated by ARM C/C++ Compiler with , RVCT4.0 [Build 524] for uVision
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\obj\main.o --depend=.\obj\main.d --device=DARMSTM --apcs=interwork -O3 -I..\..\library\inc -I..\..\library\src -I..\uvsion -Id:\Keil\ARM\INC\ST\STM32F10x --omf_browse=.\obj\main.crf main.c]
                          THUMB

                          AREA ||i.EXTI_Configuration||, CODE, READONLY, ALIGN=1

                  EXTI_Configuration PROC
;;;165    *******************************************************************************/
;;;166    void EXTI_Configuration(void)
000000  b51c              PUSH     {r2-r4,lr}
;;;167    {
;;;168      EXTI_InitTypeDef EXTI_InitStructure;
;;;169    
;;;170      /* Connect EXTI Line9 to PB.9 */
;;;171      GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource9);
000002  2109              MOVS     r1,#9
000004  2001              MOVS     r0,#1
000006  f7fffffe          BL       GPIO_EXTILineConfig
;;;172    
;;;173      /* Configure EXTI Line9 to generate an interrupt on falling edge */
;;;174      EXTI_ClearITPendingBit(EXTI_Line9);
00000a  f44f7400          MOV      r4,#0x200
00000e  4620              MOV      r0,r4
000010  f7fffffe          BL       EXTI_ClearITPendingBit
;;;175      EXTI_InitStructure.EXTI_Line = EXTI_Line9;
;;;176      EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
000014  2000              MOVS     r0,#0
000016  f88d0004          STRB     r0,[sp,#4]
;;;177      EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
00001a  200c              MOVS     r0,#0xc
00001c  f88d0005          STRB     r0,[sp,#5]
;;;178      EXTI_InitStructure.EXTI_LineCmd = ENABLE;
000020  2001              MOVS     r0,#1
000022  f88d0006          STRB     r0,[sp,#6]
000026  9400              STR      r4,[sp,#0]            ;176
;;;179      EXTI_Init(&EXTI_InitStructure); 
000028  4668              MOV      r0,sp
00002a  f7fffffe          BL       EXTI_Init
;;;180    }
00002e  bd1c              POP      {r2-r4,pc}
;;;181    
                          ENDP


                          AREA ||i.GPIO_Configuration||, CODE, READONLY, ALIGN=2

                  GPIO_Configuration PROC
;;;142    *******************************************************************************/
;;;143    void GPIO_Configuration(void)
000000  b508              PUSH     {r3,lr}
;;;144    {
;;;145      GPIO_InitTypeDef GPIO_InitStructure;
;;;146    
;;;147      /* Configure PC.06 and PC.07 as Output push-pull */
;;;148      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7;
000002  20c0              MOVS     r0,#0xc0
000004  f8ad0000          STRH     r0,[sp,#0]
;;;149      GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
000008  2003              MOVS     r0,#3
00000a  f88d0002          STRB     r0,[sp,#2]
;;;150      GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
00000e  2010              MOVS     r0,#0x10
000010  f88d0003          STRB     r0,[sp,#3]
;;;151      GPIO_Init(GPIOC, &GPIO_InitStructure);
000014  4669              MOV      r1,sp
000016  4807              LDR      r0,|L2.52|
000018  f7fffffe          BL       GPIO_Init
;;;152    
;;;153      /* Configure PB9 as input floating (EXTI Line9) */
;;;154      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
00001c  f44f7000          MOV      r0,#0x200
000020  f8ad0000          STRH     r0,[sp,#0]
;;;155      GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
000024  2004              MOVS     r0,#4
000026  f88d0003          STRB     r0,[sp,#3]
;;;156      GPIO_Init(GPIOB, &GPIO_InitStructure);
00002a  4669              MOV      r1,sp
00002c  4802              LDR      r0,|L2.56|
00002e  f7fffffe          BL       GPIO_Init
;;;157    }
000032  bd08              POP      {r3,pc}
;;;158    
                          ENDP

                  |L2.52|
                          DCD      0x40011000
                  |L2.56|
                          DCD      0x40010c00

                          AREA ||i.NVIC_Configuration||, CODE, READONLY, ALIGN=1

                  NVIC_Configuration PROC
;;;188    *******************************************************************************/
;;;189    void NVIC_Configuration(void)
000000  b538              PUSH     {r3-r5,lr}
;;;190    {
;;;191      NVIC_InitTypeDef NVIC_InitStructure;
;;;192    
;;;193      /* 2 bits for Preemption Priority and  2 bits for Sub Priority */
;;;194      NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
000002  f44f60a0          MOV      r0,#0x500
000006  f7fffffe          BL       NVIC_PriorityGroupConfig
;;;195    
;;;196      NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQChannel;
00000a  2017              MOVS     r0,#0x17
00000c  f88d0000          STRB     r0,[sp,#0]
;;;197      NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
000010  2400              MOVS     r4,#0
000012  f88d4001          STRB     r4,[sp,#1]
;;;198      NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
000016  f88d4002          STRB     r4,[sp,#2]
;;;199      NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
00001a  2501              MOVS     r5,#1
00001c  f88d5003          STRB     r5,[sp,#3]
;;;200      NVIC_Init(&NVIC_InitStructure);
000020  4668              MOV      r0,sp
000022  f7fffffe          BL       NVIC_Init
;;;201    
;;;202      NVIC_InitStructure.NVIC_IRQChannel = WWDG_IRQChannel;
000026  f88d4000          STRB     r4,[sp,#0]
;;;203      NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
00002a  f88d5001          STRB     r5,[sp,#1]
;;;204      NVIC_Init(&NVIC_InitStructure);
00002e  4668              MOV      r0,sp
000030  f7fffffe          BL       NVIC_Init
;;;205    }
000034  bd38              POP      {r3-r5,pc}
;;;206    
                          ENDP


                          AREA ||i.RCC_Configuration||, CODE, READONLY, ALIGN=2

                  RCC_Configuration PROC
;;;94     *******************************************************************************/
;;;95     void RCC_Configuration(void)
000000  b510              PUSH     {r4,lr}
;;;96     {
;;;97       /* RCC system reset(for debug purpose) */
;;;98       RCC_DeInit();
000002  f7fffffe          BL       RCC_DeInit
;;;99     
;;;100      /* Enable HSE */
;;;101      RCC_HSEConfig(RCC_HSE_ON);
000006  f44f3080          MOV      r0,#0x10000
00000a  f7fffffe          BL       RCC_HSEConfig
;;;102    
;;;103      /* Wait till HSE is ready */
;;;104      HSEStartUpStatus = RCC_WaitForHSEStartUp();
00000e  f7fffffe          BL       RCC_WaitForHSEStartUp
000012  4910              LDR      r1,|L4.84|
000014  7008              STRB     r0,[r1,#0]
;;;105    
;;;106      if(HSEStartUpStatus == SUCCESS)
000016  b2c0              UXTB     r0,r0
000018  2801              CMP      r0,#1
00001a  d115              BNE      |L4.72|
;;;107      {
;;;108        /* HCLK = SYSCLK */
;;;109        RCC_HCLKConfig(RCC_SYSCLK_Div1); 
00001c  2000              MOVS     r0,#0
00001e  f7fffffe          BL       RCC_HCLKConfig
;;;110      
;;;111        /* PCLK2 = HCLK */
;;;112        RCC_PCLK2Config(RCC_HCLK_Div1); 
000022  2000              MOVS     r0,#0
000024  f7fffffe          BL       RCC_PCLK2Config
;;;113    
;;;114        /* PCLK1 = HCLK */
;;;115        RCC_PCLK1Config(RCC_HCLK_Div1);
000028  2000              MOVS     r0,#0
00002a  f7fffffe          BL       RCC_PCLK1Config
;;;116    
;;;117        /* Flash 0 wait state */
;;;118        FLASH_SetLatency(FLASH_Latency_0);
00002e  2000              MOVS     r0,#0
000030  f7fffffe          BL       FLASH_SetLatency
;;;119        /* Enable Prefetch Buffer */
;;;120        FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
000034  2010              MOVS     r0,#0x10
000036  f7fffffe          BL       FLASH_PrefetchBufferCmd
;;;121    
;;;122        /* Select HSE as system clock source */
;;;123        RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE);
00003a  2001              MOVS     r0,#1
00003c  f7fffffe          BL       RCC_SYSCLKConfig
                  |L4.64|
;;;124    
;;;125        /* Wait till HSE is used as system clock source */
;;;126        while(RCC_GetSYSCLKSource() != 0x04)
000040  f7fffffe          BL       RCC_GetSYSCLKSource
000044  2804              CMP      r0,#4
000046  d1fb              BNE      |L4.64|
                  |L4.72|
;;;127        {
;;;128        }
;;;129      }
;;;130      
;;;131      /* Enable GPIOC, GPIOB and AFIO clock */
;;;132      RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOB |
000048  2101              MOVS     r1,#1
00004a  e8bd4010          POP      {r4,lr}
00004e  2019              MOVS     r0,#0x19
000050  f7ffbffe          B.W      RCC_APB2PeriphClockCmd
;;;133                             RCC_APB2Periph_AFIO, ENABLE);  
;;;134    }
;;;135    
                          ENDP

                  |L4.84|
                          DCD      ||.data||

                          AREA ||i.main||, CODE, READONLY, ALIGN=2

                  main PROC
;;;30     *******************************************************************************/
;;;31     int main(void)
000000  b510              PUSH     {r4,lr}
;;;32     {
;;;33     #ifdef DEBUG
;;;34       debug();
;;;35     #endif
;;;36     
;;;37       /* System Clocks Configuration ---------------------------------------------*/
;;;38       RCC_Configuration();
000002  f7fffffe          BL       RCC_Configuration
;;;39          
;;;40       /* GPIO configuration ------------------------------------------------------*/
;;;41       GPIO_Configuration();
000006  f7fffffe          BL       GPIO_Configuration
;;;42     
;;;43       /* Check if the system has resumed from WWDG reset -------------------------*/
;;;44       if(RCC_GetFlagStatus(RCC_FLAG_WWDGRST) != RESET)
00000a  207e              MOVS     r0,#0x7e
00000c  f7fffffe          BL       RCC_GetFlagStatus
;;;45       {	/* WWDGRST flag set */
;;;46         /* Turn on led connected to PC.06 */
;;;47         GPIO_WriteBit(GPIOC, GPIO_Pin_6, Bit_SET);
000010  4b12              LDR      r3,|L5.92|
000012  b138              CBZ      r0,|L5.36|
000014  2201              MOVS     r2,#1
000016  2140              MOVS     r1,#0x40
000018  4618              MOV      r0,r3
00001a  f7fffffe          BL       GPIO_WriteBit
;;;48     
;;;49     	/* Clear reset flags */
;;;50         RCC_ClearFlag();
00001e  f7fffffe          BL       RCC_ClearFlag
000022  e004              B        |L5.46|
                  |L5.36|
;;;51       }
;;;52       else
;;;53       {	/* WWDGRST flag is not set */
;;;54         /* Turn off led connected to PC.06 */
;;;55         GPIO_WriteBit(GPIOC, GPIO_Pin_6, Bit_RESET);
000024  2200              MOVS     r2,#0
000026  2140              MOVS     r1,#0x40
000028  4618              MOV      r0,r3
00002a  f7fffffe          BL       GPIO_WriteBit
                  |L5.46|
;;;56       }
;;;57     
;;;58       /* Configure EXTI Line9 to generate an interrupt on falling edge -----------*/
;;;59       EXTI_Configuration();
00002e  f7fffffe          BL       EXTI_Configuration
;;;60     
;;;61     /* NVIC configuration --------------------------------------------------------*/
;;;62       NVIC_Configuration();
000032  f7fffffe          BL       NVIC_Configuration
;;;63     
;;;64     /* WWDG configuration --------------------------------------------------------*/
;;;65       /* Enable WWDG clock */
;;;66       RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE);
000036  2101              MOVS     r1,#1
000038  02c8              LSLS     r0,r1,#11
00003a  f7fffffe          BL       RCC_APB1PeriphClockCmd
;;;67     
;;;68       /* WWDG clock counter = (PCLK1/4096)/8 = 244 Hz (~4 ms)  */
;;;69       WWDG_SetPrescaler(WWDG_Prescaler_8);
00003e  f44f70c0          MOV      r0,#0x180
000042  f7fffffe          BL       WWDG_SetPrescaler
;;;70     
;;;71       /* Set Window value to 0x41 */
;;;72       WWDG_SetWindowValue(0x41);
000046  2041              MOVS     r0,#0x41
000048  f7fffffe          BL       WWDG_SetWindowValue
;;;73     
;;;74       /* Enable WWDG and set counter value to 0x7F, WWDG timeout = ~4 ms * 64 = 262 ms */
;;;75       WWDG_Enable(0x7F);
00004c  207f              MOVS     r0,#0x7f
00004e  f7fffffe          BL       WWDG_Enable
;;;76     
;;;77       /* Clear EWI flag */
;;;78       WWDG_ClearFlag();
000052  f7fffffe          BL       WWDG_ClearFlag
;;;79     
;;;80       /* Enable EW interrupt */
;;;81       WWDG_EnableIT();
000056  f7fffffe          BL       WWDG_EnableIT
                  |L5.90|
;;;82     
;;;83       while (1)
00005a  e7fe              B        |L5.90|
;;;84       {
;;;85       }
;;;86     }
;;;87     
                          ENDP

                  |L5.92|
                          DCD      0x40011000

                          AREA ||.data||, DATA, ALIGN=0

                  HSEStartUpStatus
000000  00                DCB      0x00

                  __ARM_use_no_argv EQU 0
